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I usually pass macro definitions from make command line to a makefile using the option: I want to use the make command as part of setting up the code environment, but i'm using windows. In other words, i want to pass some arguments which will eventually become variables in the makefile.

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If this file name was /bin/make, then the recipe executed is cd subdir.

For variable assignment in make, i see := and = operator.

The error that you've quoted must have been preceded by an error from gcc, please quote that as well. What's the difference between them? Cd subdir && $(make) the value of this variable is the file name with which make was invoked. Msys2 have many types of runtime and they.

The definition is accessible inside the makefile. By using 'gmake' specifically you can use gnu make extensions. The language accepted by gnu make is a superset of the one supported by the traditional make utility.